The AMD LogiCORE™ IP 1G/2.5G Ethernet PCS/PMA or SGMII core provides the following capabilities:
- Supported physical interfaces for 1000BASE-X and 2500BASE-X, SGMII, or 2.5G SGMII standards
- Integrated device-specific transceiver interface
- Support for 1000BASE-X or SGMII over High-Speed Select Input/Output (I/O) Low Voltage Differential Signaling (LVDS) in Zynq 7000, UltraScale, UltraScale+, and 7 series devices
- Support for Synchronous and Asynchronous Low Voltage Differential Signaling (LVDS) solution with Advanced IO Wizard module for AMD Versal™ adaptive SoC devices.
- The Synchronous mode LVDS support is integrated with X5IO Wizard for Versal adaptive SoC Gen 2 devices. The Asynchronous mode is not supported in X5IO Wizard, so Gig Ethernet PCS PMA IP does not support the Async LVDS for AMD Versal adaptive SoC Gen 2 devices.
- Configured and monitored through MDIO
- 1000BASE-X or 2500BASE-X and SGMII Auto-Negotiation supported
- Support for full duplex only
- Support preamble shrinkage for 2.5G core speed