Using the Vivado Design Suite Debug Feature - Using the Vivado Design Suite Debug Feature - 11.1 English - PG046

The Integrated Logic Analyzer (ILA) and Virtual Input Output (VIO) cores in the Vivado lab tools feature help to debug and validate the design in boards. These cores are provided with the Aurora 8B/10B core. Select the Vivado Lab Edition check box on the Core Options tab of the Customize IP interface in the Vivado Integrated Design Environment (IDE) to include the ILA and VIO cores in the example design. Alternatively, the USE_CHIPSCOPE parameter in the <component name>_exdes module can be set to 1 before running implementation.

See the Vivado Design Suite User Guide: Programming and Debugging (UG908).