If the Aurora 8B/10B
core asserts and deasserts the channel_up signal,
enable internal loopback and check for a stable channel up condition. Probe RXBUFSTATUS of the transceiver. If there is overflow or
underflow, the CLK_COR_MIN_LAT and CLK_COR_MAX_LAT attribute values for the transceiver must be adjusted.
Also make sure the hot-plug logic is disable when the standard_cc block is not used. In a duplex link, if the RXBUFSTATUS signal is toggling frequently before lane_up or channel_up
assertion, or if the link is flaky as a result of RX electrical idle exit
after the gt_reset_i is deasserted, enable the newly
added user parameter C_DOUBLE_GTRXRESET. This parameter can be enabled during IP core
generation using the Tcl mode. By enabling this Tcl parameter, the IP core attempts to
repeat the GT RX reset sequence after it achieves initial symbol lock to avoid any
potential errors seen during link initialization as referred in
7
Series FPGAs GTX/GTH Transceivers User Guide (UG476) and
UltraScale
Architecture GTH Transceivers User Guide (UG576).