Step 10: Channel comes up in simulation but not in hardware - Step 10: Channel comes up in simulation but not in hardware - 11.1 English - PG046
Aurora 8B/10B LogiCORE IP Product Guide (PG046)
- Document ID
- PG046
- Release Date
- 2025-12-18
- Version
- 11.1 English
- Both
reset and
gt_reset inputs are active-High. Make sure the
reset polarity is taken care in the hardware.
- Make sure the
refclk frequency is exactly the same as the Aurora 8B/10B
core
is generated for.
- If the
refclk is driven from a
synthesizer, make sure the synthesizer is stable (locked).
- Make sure the cable connection from TXP/TXN to
RXP/RXN is proper.
- If there are RXNOTINTABLE errors observed from the
serial transceiver, validate the link using IBERT. Make sure there is no BER in
the channel. Use the sweep test in the IBERT tool and use the same serial
transceiver attributes which provide "Zero" BER in IBERT.
- A burst of soft errors results in a hard error
and re-initializes the channel. Set
ENABLE_SOFT_ERR_MONITOR to
0 in the <component name>_err_detect module to disable
hard error assertion from soft errors.