Simulation speed up - 11.1 English - PG046

The C_EXAMPLE_SIMULATION parameter is introduced to speed up post synthesis/implementation netlist functional simulations:

1. If you are using the tcl script to generate an IP Core, add the Parameter c_example_simulation to set to true as part of the tcl script.
   Note: This mode of IP core generation is only for Simulation purposes. If you intend to test on board, the above command should not be added as part of the IP core generation.
2. If you do not want to set tcl commands during IP core generation and instead edit the code to see the simulation speed up, then change the EXAMPLE_SIMULATION parameter in the generated RTL code to 1 in the following file to speed up functional simulations:

   <USER_COMPONENT_NAME>_core.v[hd]

For more information, see the Vivado Design Suite User Guide: Designing with IP (UG896).