Simulate the Core - 11.1 English - PG046

1. Click Run Simulation in the Vivado Integrated Design Environment (IDE) and select the type of simulation.
2. QuestaSim launches and compiles the modules.
3. The wave_mti.do file loads automatically and populates the AXI4-Stream signals.
4. Allow the simulation to run. This might take some time.
   1. Initially lane up is asserted.
   2. Channel up is then asserted and the data transfer begins.
   3. Data transfer from all flow control interfaces now begins.
   4. The frame checker continuously checks the received data and reports any data mismatch.
5. A TEST PASS or TEST FAIL status is printed on the QuestaSim console providing the status of the test.