Customize IP - 11.1 English - PG046

Aurora 8B/10B LogiCORE IP Product Guide (PG046)

Document ID
PG046
Release Date
2025-05-29
Version
11.1 English

The following figure shows the Core Options tab of the Customize IP interface with the default options for AMD Zynq™ 7000 and 7 series devices. The left side displays a representative block diagram of the Aurora 8B/10B core as currently configured. The right side consists of user-configurable parameters.

The GT Selections tab is shown in Figure 2 for AMD Virtex™ 7 and AMD Kintex™ 7 FPGA GTX and GTH transceivers.

Figure 1. Aurora 8B/10B Core Options Tab for Zynq 7000 and 7 Series Devices

Figure 2. Aurora 8B/10B Core Options Tab for UltraScale Devices

Figure 3. Aurora 8B/10B Core Options Tab for UltraScale Devices showing Advanced GT Options

The following four customization options are shown only in the Core Options tab for UltraScale devices. See UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182) for additional details on the Advanced GT options selection.

The preceding two figures show the Core Options tab for UltraScale devices.