Using the Client Side GMII/MII Datapath - 4.0 English - PG029

Quad Serial Gigabit Media Independent LogiCORE IP Product Guide (PG029)
Document ID
PG029
Release Date
2025-12-09
Version
4.0 English
This chapter provides general guidelines for using the client-side instances of GMII/MII interfaces of the QSGMII core. In most applications, the client-side GMII is expected to be used as an internal interface connecting to either:
Proprietary customer logic

This chapter describes the GMII-styled interface that is present on the netlist of the core.

The chapter also focuses on additional adaptation logic (which is provided by the example design delivered with the core). This logic enhances the internal GMII-styled interface to support 10 Mb/s and 100 Mb/s Ethernet speeds in addition to the nominal 1 Gb/s speed of SGMII.

AMD LogiCORE™ IP Tri-Mode Ethernet MAC

The QSGMII core can be integrated in a single device with multiple instances of the AMD LogiCORE™ IP Tri-Mode Ethernet MAC core to extend the system functionality to include the MAC sublayer. See the “Interfacing to Other Cores” section in the “Designing with the Core” chapter in the 1G/2.5G Ethernet PCS/PMA or 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047).

CAUTION:
The TEMAC core should always be configured for full-duplex operation when used with the QSGMII core. This constraint is due to the increased latency introduced by the QSGMII core. With half-duplex operation, the MA IEEE 802.3-2008 Specification response to collisions is late, violating the Code-Division Multiple Access (CDMA) protocol.

In rare applications, the Client-Side GMII datapath can be used as a true GMII/MII to connect externally off-chip across a PCB. This external GMII functionality is included in the HDL example design delivered with the core by the AMD Vivado™ design tools to act as an illustration. The extra logic required to create a true external GMII is detailed in Implementing External GMII/MII.