System Overview - 3.5 English

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English

The QSGMII core provides the functionality to implement the sublayers as specified by the Cisco QSGMII specification.

The QSGMII core interfaces to a device-specific transceiver. The transceiver provides some of the PCS functionality, such as 8B/10B encoding/decoding, Physical Medium Attachment (PMA) Serializer/Deserializer (SerDes), and clock recovery. This Figure illustrates the remaining PCS sublayer functionality and also shows the major functional blocks of the core.

Figure 1-1: QSGMII System Overview

X-Ref Target - Figure 1-1

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