Register 5: SGMII Auto-Negotiation Link Partner Ability - 3.5 English

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English
Figure 2-19: MDIO Register 5: SGMII Auto-Negotiation Link Partner Ability

X-Ref Target - Figure 2-19

pg029_qsgmii_product_spec00025.jpg

The Auto-Negotiation Ability Base register (Register 5) contains information related to the status of the link between the PHY and its physical link partner across the Medium.

Table 2-20: SGMII Auto-Negotiation Link Partner Ability Base (Register 5)

Bits

Name

Description

Attributes

Default Value

5.15

PHY Link Status

This refers to the link status of the PHY with its link partner across the Medium.

1 = Link Up

0 = Link Down

read only

1

5.14

Acknowledge

Used by Auto-Negotiation function to indicate reception of a link partner base or next page

read only

0

5.13

Reserved

Always returns 0, writes ignored

returns 0

0

5.12

Duplex Mode

1= Full Duplex

0 = Half Duplex

read only

0

5.11:10

Speed

11 = Reserved

10 = 1 Gbps

01 = 100 Mbps

00 = 10 Mbps

read only

00

5.9:1

Reserved

Always return 0s

returns 0s

000000000

5.0

Reserved

Always returns 1

returns 1

1