Ports Removed - 3.5 English

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English

The following ports were removed from the core interface and are driven internally in the core.

Table B-6: Ports Removed

In/Out

Port Name and Width

Description

What to do

Input

link_timer_value_chx[8:0]

Used to configure the duration of the Auto-Negotiation Link Timer period. The duration of this timer is set to the binary number input into this port multiplied by 4096 clock periods of the 125 MHz reference clock (8 ns).

For normal operation the value of link timer is set internally to "000110010" as specified in QSGMII specification for 1.6 ms link time. To speed up simulation this value can be set internally to "000000100." This is done though xci file by the parameter EXAMPLE_SIMULATION.