Port Changes from v3.0 to v3.1 - 3.5 English

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English

The following ports were added to the core, but only if the Transceiver Debug feature was requested during core customization. Consult the relevant transceiver user guide for more information on using these control/status ports.

Table B-2: Ports Added

Port Name and Width

In/Out

Description

What to do

gt0_rxlpmreset_in

Input

RX LPM Reset (valid only for GTP transceivers)

If not used, should be tied off as specified in the transceiver guide.

gt0_rxlpmhfovrden_in

Input

Valid only for GTP transceivers

gt0_dmonitorout_out[16:0]

Output

Digital Monitor to monitor state of LPM/DFE loops

gt0_gttxreset_in

Input

Reset to start full transmit reset sequence. Present in only non UltraScale devices.

gt0_txpcsreset_in

Input

Reset for TX PCS

gt0_txpmareset_in

Input

Reset for TX PMA

gt0_gtrxreset_in

Input

Reset to start full receive reset sequence. Present in only non UltraScale devices.

gt0_rxpcsreset_in

Input

Reset for RX PCS

gt0_rxpmareset_in

Input

Reset for RX PMA

gt0_rxpmaresetdone_out

Output

Indication that RX PMA reset sequence is complete. Available only for non GTX transceivers.

gt0_cplllock_out

Output

Indication that CPLL has locked

gt0_txbufstatus_out[1:0]

Output

Indicates the status of TX buffer