MDIO REGISTER 0: SGMII CONTROL CHANNELS 1-3 - 4.0 English - PG029

Quad Serial Gigabit Media Independent LogiCORE IP Product Guide (PG029)

Document ID
PG029
Release Date
2025-12-09
Version
4.0 English
Figure 1. MDIO Register 0: SGMII Control Channels/Modules 1-3
Table 1. SGMII Control Register Channels/Modules 1-3 (Register 0)
Bits Name Description Attributes Default Value
0.15 Reset

1 = SGMII module 1-3 Reset

0 = Normal Operation

read/write self clearing 0
0.14 Reserved Returns what is written read/write 0
0.13 Speed Selection (LSB) Always returns a 0 for this bit. Together with bit 0.6, speed selection of 1000 Mb/s is identified. returns 0 0
0.12 Auto-Negotiation Enable

1 = Enable SGMII Auto-Negotiation Process

0 = Disable SGMII Auto-Negotiation Process

read/write 1
0.11 Reserved Returns what is written read/ write 0
0.10 Isolate

1 = Electrically Isolate SGMII logic from GMII

0 = Normal operation

read/write 1
0.9 Restart Auto- Negotiation

1 = Restart Auto-Negotiation Process across SGMII link

0 = Normal Operation

read/write self clearing 0
0.8 Duplex Mode Always returns a 1 for this bit to signal Full-Duplex Mode returns 1 1
0.7 Collision Test Always returns a 0 for this bit to disable COL test returns 0 0
0.6 Speed Selection (MSB) Always returns a 1 for this bit. Together with bit 0.13, speed selection of 1000 Mb/s is identified. returns 1 1
0.5 Unidirectional Enable Enable transmit regardless of whether a valid link has been established provided AN is disabled. read/ write 0
0.4:0.0 Reserved Always return 0s, writes ignored returns 0s 00000