Implementing External GMII/MII - 4.0 English - PG029

Quad Serial Gigabit Media Independent LogiCORE IP Product Guide (PG029)

Document ID
PG029
Release Date
2025-12-09
Version
4.0 English

In certain applications, the client-side GMII/MII datapath can be used as a true GMII/MII to connect externally off-device across a PCB. This external GMII/MII functionality is included in the HDL block level and is seamlessly delivered with the core by the AMD Vivado™ IP catalog. This extra logic required to accomplish this is described in this Appendix.

Note: AMD Virtex™ 7 devices support GMII at 3.3V or lower only in certain parts and packages; see the AMD Virtex™ 7 device documentation. AMD Zynq™ 7000 SoC, AMD Kintex™ 7, and AMD Artix™ 7 devices support GMII at 3.3V or lower.