I/O Location Constraints - 3.5 English - PG029

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English

No specific I/O location constraints are required.

However, when employing BUFIO and BUFR regional clock routing, ensure that a BUFIO capable clock input pin is selected for input clock sources, and that all related input synchronous data signals are placed in the respective BUFIO region. The user guide for the appropriate family should be consulted.