The Artix 7 FPGA GTP transceiver has many attributes that are set directly from the HDL source code for the transceiver wrapper file delivered with the example design. These can be found in the gtwizard_gt.vhd file (for VHDL design entry) or the gtwizard_gt.vhd.v file (for Verilog design entry); these files were generated using the 7 series FPGA transceiver wizard. To change the attributes, re-run the wizard.