GMII Reception - 4.0 English - PG029

Quad Serial Gigabit Media Independent LogiCORE IP Product Guide (PG029)

Document ID
PG029
Release Date
2025-12-09
Version
4.0 English

This section includes figures that illustrate GMII reception. In these figures, the clock is not labeled. The source of this clock signal varies, depending on the options used when the core is generated.

Normal Frame Reception

The timing of normal inbound frame transfer is illustrated in the following figure. This shows that Ethernet frame reception is proceeded by a preamble field. The (see clause 35) allows for up to all of the seven preamble bytes that proceed the Start of Frame Delimiter (SFD) to be lost in the network. The SFD is always present in well-formed frames.

Figure 1. GMII Normal Frame Reception

Normal Frame Reception with Extension Field

In accordance with the IEEE 802.3-2008 Specification [Ref 2], clause 36, state machines for the 1000BASE-X PCS, gmii_rx_er_chx can be driven High following reception of the end frame with gmii_rxd_chx[7:0] containing the hexadecimal value of 0x0F to signal carrier extension. This is illustrated in the following figure. This is not an error condition and can occur even for full-duplex frames.

This is not an error condition and can occur even for full-duplex frames.

Figure 2. GMII Normal Frame Reception with Carrier Extension

Frame Reception with Errors

The signal gmii_rx_er_chx when asserted within the assertion window signals that a frame was received with a detected error (following figure). In addition, a late error can also be detected during the Carrier Extension interval. This is indicated by gmii_rxd_chx[7:0] containing the hexadecimal value 0x1F, also illustrated in the following figure.

Figure 3. GMII Frame Reception with Errors