If you are migrating from a 7 series device to an UltraScale+™ families or UltraScale™ architecture, the prefix of the optional transceiver debug ports for single-lane cores is changed from gt0 or gt1 to gt , and the postfix _in and _out are dropped.
For multi-lane cores, the prefixes of the optional transceiver debug ports gt(n) are aggregated into a single port. For example, gt0_gtrxreset and gt1_gtrxreset become gt_gtrxreset [1:0] .
Note: This is true for all ports except DRP buses, which follow the convention gt(n)_drpxyz .
It is important to update your design to use the new transceiver debug port names. For more information about migration to UltraScale devices, see the UltraScale Migration Methodology Guide (UG1026) [Ref 15] .