This Figure displays the QSGMII customization Vivado IDE, used to set core parameters and options. For help starting and using Vivado design tools on your system, see the documentation included with the Vivado Design Suite
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• Component Name – The component name is the base name of the output files generated for the core. Names must begin with a letter and can include alphanumeric characters and the underscore (_).
• Select Mode – The QSGMII core has two main modes of operation.
° MAC Mode – QSGMII interfaces with the IP catalog Tri-mode Ethernet IP on the GMII client side.
° PHY Mode – QSGMII can interface with third-party Ethernet IP cores. The client interface can be selected as GMII or MII.
• MDIO Management Interface – Select this option to include the MDIO Management Interface to access the PCS Configuration registers. MDIO Management Interface is selected by default.
• MDIO Configuration Interface – Select this option to include an additional configuration interface to program configuration register 0 and can be used in addition to the MDIO Management Interface. This option is always selected if MDIO Management Interface is disabled.
• Auto-Negotiation – Select this option to include auto-negotiation functionality with the core. Auto-Negotiation is selected by default.
• AN Configuration Interface – Select this option to include and additional configuration interface to program the AN Advertisement register (register 4). This option is valid only if Auto-Negotiation is enabled.
• PHY Address Chx – Use this option to define the PHY address of the MDIO interface of individual channels in the core. The value should be in the range of 0 to 31.
• RX Gmii Clk Source – This option selects the clock source of the receive path and gmii_rx interface. When the RXOUTCLK is selected, the entire receive datapath works on rxusrclk2 and the elastic buffer on the receive path is bypassed.
• DRP Clock Frequency – This option is available only for UltraScale and UltraScale+™ devices and if Additional Transceiver Control and Status Ports is selected. This indicates the DRP frequency operation, selectable between 6.25 MHz to 125 MHz.
• Transceiver Clocking and Location – This option is only available when an UltraScale or UltraScale+ device is selected. This gives a list of possible sources for reference clock and location of channel for selection.
• Additional Transceiver Control and Status Ports – If selected, enables additional transceiver control ports for DRP, TX Driver, RX Equalization, and other features such as PRBS.