The core has four instances of SGMII cores. These constraints are valid only when the core is generated with the MODE parameter set to PHY_MODE and the Interface parameter set to GMII in the Vivado IDE. When implementing an external GMII, the Transmitter Elastic Buffer embedded in the QSGMII block is used. The input transmitter GMII signals are then synchronous to their own clock domain ( gtx_clk_chx is used in the example design). These clocks must be constrained for a clock frequency of 125 MHz. The following XDC syntax shows the necessary constraints being applied to the example design.
#***********************************************************
# GMII GTX transceiver CLK for clocking in GMII TX Interface*
#***********************************************************
create_clock -add -name gtx_clk_ch0 -period 8.000 [get_ports gtx_clk_ch0]
create_clock -add -name gtx_clk_ch1 -period 8.000 [get_ports gtx_clk_ch1]
create_clock -add -name gtx_clk_ch2 -period 8.000 [get_ports gtx_clk_ch2]
create_clock -add -name gtx_clk_ch3 -period 8.000 [get_ports gtx_clk_ch3]