100 Mbps Frame Transmission - 3.5 English - PG029

Quad Serial Gigabit Media Independent LogiCORE Product Guide (PG029)

Document ID
PG029
Release Date
2023-11-02
Version
3.5 English

The operation of the core remains unchanged. It is the responsibility of the client logic (for example, an Ethernet MAC) to enter data at the correct rate. When operating at a speed of 100 Mbps, every byte of the MAC frame (from preamble field to the Frame Check Sequence field, inclusive) should each be repeated for 10 clock periods to achieve the desired bit rate, as illustrated in This Figure . It is also the responsibility of the client logic to ensure that the interframe gap period is legal for the current speed of operation.

Figure 4-6: 100 Mbps Frame Transmission

X-Ref Target - Figure 4-6

100_Mbps_Frame_Transmission.jpg