The AXI DataMover has two reset inputs for each of the MM2S and S2MM blocks for a total of four reset inputs.
AXI DataMover requires that the input reset assertion must be a minimum of three clock periods of the synchronizing clock. The following table shows the clock and reset signals and its associated interface.
| Asynchronous Mode | |||
|---|---|---|---|
| Blocks | Interface | Disabled | Enabled |
| MM2S | Memory map and Streaming Interface | m_axi_mm2s_aclk and m_axi_mm2s_aresetn | m_axi_mm2s_aclk and m_axi_mm2s_aresetn |
| Command and Status Interface | m_axi_mm2s_aclk and m_axi_mm2s_aresetn | m_axis_mm2s_cmdsts_aclk and m_axis_mm2s_cmdsts_aresetn | |
| Asynchronous Mode | |||
| Blocks | Interface | Disabled | Enabled |
| S2MM | Memory map and Streaming Interface | m_axi_s2mm_aclk and m_axi_s2mm_aresetn | m_axi_s2mm_aclk and m_axi_s2mm_aresetn |
| Command and Status Interface | m_axi_s2mm_aclk and m_axi_s2mm_aresetn | m_axis_s2mm_cmdsts_awclk and m_axis_s2mm_cmdsts_aresetn | |