The fsync_in pin is an active-High input. The
video timing generator synchronizes to the fsync_in
input if used. The fsync_in must be driven High for only
one clock cycle per frame. This resets all internal generator counters and starts the
generated frame timing synchronized to this input. Internally, the fsync_in pin is logically "OR" combined with the internal
frame sync det_fsync, produced by the detector. The
internal frame sync det_fsync is generated by the video
timing detector and can be used to synchronize the generator timing to the detector
timing. The internal logic for this is shown in the figure. If the fsync_in input is used, the detector must be disabled.
Likewise, if the detector is used, the fsync_in pin
must be driven to 0. The use of the external fsync_in pin and the detector can be changed at runtime,
but it is important that fsync_in and det_fsync are never asserted simultaneously.
