Simulation
A highly parameterizable test bench was used to test the VTC core. Testing included the following:
- Register accesses
- Processing of multiple frames of data
- Testing of various frame sizes including 1080p, 720p, and 480p
- Varying instantiations of the core
- Varying the polarity of input and output signals
- Varying the horizontal offset of the vertical timing signals
- Regenerating the input on the output
- Testing of various interrupts
Hardware Testing
The VTC core has been tested in a variety of hardware platforms at AMD to represent a variety of parameterizations, including the following:
- A test design was developed for the core that incorporated a
MicroBlaze™
processor, AXI4 Interconnect and various
other peripherals. The software for the test system included live video input for the
VTC core. The VTC, in addition to live video, was also connected in loopback
allow the generator to feed the detector for a robust loopback test. Various tests could
be supported by varying the configuration of the Timing Controller core or by loading a
different software executable. The MicroBlaze processor was
responsible for:
- Initializing the appropriate input and output buffers in external memory
- Initializing the VTC core
- Initializing the HDMI™ /DVI input and output cores for live video
- Launching the test
- Configuring the VTC for various input frame sizes and checking the detection/generation loopback connection for correct video detection
- Controlling the peripherals including the UART and AXI VDMAs