The following sections detail the performance characteristics of the VTC core.
Maximum Frequencies
This section contains typical clock frequencies for the target devices. The maximum achievable clock frequency can vary. The maximum achievable clock frequency and all resource counts can be affected by other tool options, additional logic in the FPGA device, using a different version of AMD tools and other factors.
- AMD Virtex™ 7, AMD Kintex™ 7, AMD Zynq™ 7000 (XC7Z030, XC7Z045) Devices: 225 MHz
- AMD Artix™ 7, Zynq 7000 (XC7Z010, XC7Z020) Devices: 150 MHz
- AMD Kintex™ UltraScale™ , AMD Kintex™ UltraScale+™ (XKU035, XCKU15P) Devices: 400 MHz
- AMD Zynq™ UltraScale+™ MPSoC family: 400 MHz
Latency
The VTC core does not read or generate data, and therefore, does not have a specific data latency.
The VTC core monitors and generates control signals. The output control signals can be configured to be the same as the input with no latency, or the output signals can be configured to incur a multi-clock or multi-line delay.