The Vivado tools output consists of some or all the following files.
|
Name |
Description |
|---|---|
|
v_tc_v6_2 |
Library directory for the v_tc_v6_2 core IP-XACT XML file describes which options were used to generate the core. An XCI file can also be used as a source file. |
|
v_tc_v6_2.veo |
Verilog instantiation template |
|
v_tc_v6_2.vho |
VHDL instantiation template |
|
v_tc_v6_2.xci |
IP-XACT XML file describes which options were used to generate the core. An XCI file can also be used as a source file. |
|
v_tc_v6_2.xml |
IP-XACT XML file describes how the core is constructed to build the core. |