The VTC core has two clock sources, CLK and
S_AXI_ACLK, one for each clock domain. The VTC core also has four clock enable sources:
-
CLKEN -
DET_CLKEN -
GEN_CLKEN -
S_AXI_ACLKEN
The VTC core has two clock sources, CLK and
S_AXI_ACLK, one for each clock domain. The VTC core also has four clock enable sources:
CLKEN
DET_CLKEN
GEN_CLKEN
S_AXI_ACLKEN