The IP core is composed of two parts: an actual simulation IP to be instantiated in the platform and a corresponding software runtime driver.
The software side consists of an OpenCL
implementation for emulation in Xilinx Runtime. In Xilinx runtime to enable OpenCL
API communication to sim_xdma you must set the
environment variable, XCL_EMULATION_MODE, before
running the application:
setenv XCL_EMULATION_MODE hw_emuFigure 1. Block Diagram
