XSemCfrStatus
* |
CfrStatusInfo |
Structure Pointer with CRAM Status details
- CfrStatusInfo->Status: Provides details about CRAM scan
- Bit [31-29]: Reserved
- Bit [28-25]: CRAM Target SLR ID
- 0001: Target is master only
- 0010: Target is slave 0 only
- 0100: Target is slave 1 only
- 1000: Target is slave 2 only
- Bit [24:20]: CRAM Error codes
- 00001: Unexpected CRC error when CRAM is not in observation
state
- 00010: Unexpected ECC error when CRAM is not in Observation or
Initialization state
- 00011: Safety write error in SEU handler
- 00100: ECC/CRC ISR not found in any Row
- 00101: CRAM Initialization is not done
- 00110: CRAM Start Scan failure
- 00111: CRAM Stop Scan failure
- 01000: Invalid Row for Error Injection
- 01001: Invalid QWord for Error Injection
- 01010: Invalid Bit for Error Injection
- 01011: Invalid Frame Address for Error Injection
- 01100: Unexpected Bit flip during Error Injection
- 01101: Masked Bit during Injection
- 01110: Invalid Block Type for Error Injection
- 01111: CRC or Uncorrectable Error or correctable error(when
correction is disabled) is active in CRAM
- 10000: ECC or CRC Error detected during CRAM Calibration in
case of SWECC
- Bit [19-18]: Reserved
- Bit [17]: 0: CRAM scan is enabled in design 1: CRAM scan is
disabled in design
- Bit [16]: 0: CRAM scan is not initialized 1: CRAM
Initialization is completed
- Bit [15-14]: CRAM Correctable ECC error status
- 00: No Correctable error encountered
- 01: Correctable error is detected and corrected
- 10: Correctable error is detected but not corrected
(Correction is disabled)
- 11: Reserved
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- Bit [13]: 0: No error in CRAM scan 1: CRAM scan has internal error
(Null pointer access/Safety write error) In this error condition, scan
stops and an event is triggered to R5.
- Bit [12]: 0: No error in error decoding 1: Invalid Error Location is
reported In this error condition, scan stops and an event is triggered
to R5.
- Bit [11]: 0: No correctable error detected 1: Correctable ECC error
detected In this condition, an event is sent to R5. If correction is
disabled, then scan stops. Else, scan continues to run.
- Bit [10]: 0: No CRC error 1: CRC error is detected by CRAM. In this
error condition, scan stops and an event is triggered to R5.
- Bit [09]: 0: No uncorrectable error 1: Uncorrectable ECC error is
detected In this error condition, scan stops and an event is triggered
to R5.
- Bit [08]: 0: No error in CRAM scan start-up test 1: CRAM start-up
test failure In this error condition, scan stops.
- Bit [07]: 0: No error during CRAM calibration` 1: CRAM Calibration
Timeout error In this error condition, scan stops and an event is
triggered to R5.
- Bit [06]: 0: CRAM scan is not in the fatal state 1: CRAM scan is in
the fatal state. This bit is for CRAM scan state.
- Bit [05]: 0: CRAM scan is not in the error injection state 1: CRAM
scan is in the error injection state. This bit is for CRAM scan state.
- Bit [04]: 0: CRAM scan is not in the idle state 1: CRAM scan is in
the idle state. This bit is for CRAM scan state.
- Bit [03]: 0: CRAM scan is not in the correction state 1: CRAM scan
is in the correction state. This bit is for CRAM scan state.
- Bit [02]: 0: CRAM scan is not in the observation state 1: CRAM scan
is in the observation state. This bit is for CRAM scan state.
- Bit [01]: 0: CRAM scan is not in the Initialization state 1: CRAM
scan is in the Initialization state. This bit is for CRAM scan state.
- Bit [00]: CRAM Scan is included in design. This bit is for CRAM scan
state.
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- CfrStatusInfo->ErrAddrL: This stores the low address of the last
7 corrected error details if correction is enabled in design.
- Bit [31:28]: Reserved
- Bit [27:23]: QWord location where error was detected
- Bit [22:16]: Bit location where error was detected
- Bit [15:2]: Reserved
- Bit [1:0]: Define validity of error address.
- 00: Info not available
- 01: Address out of range
- 10: Reserved
- 11: Address valid
- CfrStatusInfo->ErrAddrH: This stores the high address of the last
7 corrected error details if correction is enabled in design.
- Bits[31:27]: Reserved
- Bits[26:23]: Row number where error was detected
- Bits[22:20]: Block type of the frame
- Bits[19:0]: Frame address where error was detected
- CfrStatusInfo->ErrCorCnt: Counter value of Correctable Error Bits
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