RISC-V Processor Boot Code - RISC-V Processor Boot Code - 2026.1 English - UG643

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2026-06-23
Version
2026.1 English

The boot code performs minimum configuration which is required for an application to run starting from processor's reset state. Below is a sequence illustrating what all configuration is performed before control reaches the main function.

  1. Initialize mtvec CSR for unhandled exceptions and interrupts
  2. Initialize processor registers to 0
  3. Program stack pointer
  4. Initialize floating-point registers to +0.0
  5. Set the stack top to zero, to ensure that main program argc is zero
  6. Transfer control to _start, which clears BSS sections and jumps to the main application