The XilPM Library can be integrated with a system using the following snippet in the Microprocessor Software Specification (MSS) file:
The list of flags is as follows:
- rpu0_as_power_management_master
- rpu1_as_power_management_master
- apu_as_power_management_master
- rpu0_as_reset_management_master
- rpu1_as_reset_management_master
- apu_as_reset_management_master
The flags have two values:
- TRUE (default value): Master(APU/RPU0/RPU1) is enabled as power/reset management master
- FALSE: Master(APU/RPU0/RPU1) is disabled as power/reset management master
Note: Flag rpu1_as_power_management_master and rpu1_as_reset_management_master are only
counted if the RPU is in split mode. For more information on BSP configuration, see Setting Up Software System in the Vitis Unified IDE.