GPIO Device Used for Connecting PL Master JTAG Signals - GPIO Device Used for Connecting PL Master JTAG Signals - 2025.2 English - UG643

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)
Document ID
UG643
Release Date
2025-11-20
Version
2025.2 English

In hardware design MASTER JTAG can be connected to any one of the available GPIO devices, based on the design the following parameter must be provided with corresponding device ID of selected GPIO device.

Table 1. GPIO Device Used for Connecting PL Master JTAG Signals
Master JTAG Signal Description
XSK _EFUSEPL_AXI_GPIO_DEVICE_ID Default = XPAR_AXI_GPIO_0_DEVICE_ID.

This is for providing exact GPIO device ID, based on the design configuration this parameter can be modified to provide GPIO device ID which is used for connecting master jtag pins.