Debug Registers DBGDSAR Are Set To Incorrect Values

Versal HBM Series Production Errata (EN334)

Document ID
EN334
Release Date
2024-02-01
Revision
1.0 English

AMD Answer 76204

Each RPU processor has a DBGDSAR register that contains the offset address of its own CoreSight™ ROM table. However, reading the RPU’s DBGDSAR registers returns the following incorrect offset values:

Processor Expected DBGDSAR Value Actual DBGDSAR Value
RPU_0 0x0020_0003 0x003F_0003
RPU_1 0x0024_0003 0x003F_2003

Attempting to access the CoreSight ROM table with the incorrect offsets from these registers causes the RPU processor to take a software exception.

This issue will not be fixed.