AMD Answer 000039457
When an X5IO is configured as an output or bi-directional IO (with output enabled), asserting System Reset (SRST) or Power-on Reset (POR) may briefly cause the X5IO pin to drive an uncertain value. The X5IO can drive for a brief period of time as the reset propagates through the PL region. The SRST can be initiated through a write register while POR can be initiated either through write register or assertion of the dedicated POR_B pin.