The K24 provides a mechanism to dynamically power up or down the PL power domain through the on-board PMU. The PMU controls the power sequence to the on-board PMICs. To change the state of the PL power domain, toggle the MIO33 pin PL_PWR_EN. This pin is pulled up to VCC_PS_1V80 through a 4.7K resistor, which facilitates proper boot sequence without the need for a design in the programmable logic. Setting this pin to a logic-Low state sets the PMU to sequence PL power off. After MIO33 is set Low, it can be set to High to power-on the PL.
Refer to I2C Bus Interface for the I2C address of the PL power domain monitor.
A reference implementation is available in the som-pwrctl function of the AMD xmutil tool suite available on GitHub under pwrctl.