Recommended Operating Conditions

Table 1. Recommended Operating Conditions
Symbol	Description^{1 , 2, 3}	Min	Typ	Max	Units
V_CCAUX	Auxiliary power supply	1.455	1.500	1.545	V
V_{CCAUX_PMC}	PMC auxiliary power supply voltage	1.455	1.500	1.545	V
V_{CCAUX_SMON} ⁴	PMC system monitor power supply relative to GND_SMON	1.455	1.500	1.545	V
V_{CC_BATT} ⁵	Battery power supply to the battery-backed RAM and battery-backed real-time clock (RTC)	1.200	–	1.500	V
V_{CC_FUSE} ⁶	eFUSE programming power supply	1.745	1.800	1.854	V
V_CCINT	PL primary power supply, low (L) voltage for XC devices	0.676	0.700	0.724	V
	PL primary power supply, low (L) voltage for XA devices	0.701	0.725	0.749	V
	PL primary power supply, low (L) voltage for -2LLI devices⁷	0.701	0.725	0.749	V
	PL primary power supply, mid (M) voltage	0.775	0.800	0.825	V
	PL primary power supply, high (H) voltage	0.854	0.880	0.906	V
V_{CC_CPM5}	CPM5 primary power supply, low (L) voltage	0.676	0.700	0.724	V
	CPM5 primary power supply, mid (M) voltage	0.775	0.800	0.825	V
	CPM5 primary power supply, high (H) voltage	0.854	0.880	0.906	V
	CPM5 primary power supply, overdrive voltage for higher CPM5 performance in -1LSI, -1LLI, -2LSE, 2LLE, -2MSE, -2MLE, -2MSI, and -2MLI devices	0.854	0.880	0.906	V
V_{CC_IO} ⁸	XPIO power supply, low (L) and mid (M) voltage	0.775	0.800	0.825	V
V_{CC_IO} ⁸	XPIO power supply, high (H) voltage	0.854	0.880	0.906	V
V_CCO ⁹	XPIO bank 7## output driver power supply Includes V_CCO of 1.0V, 1.1V, 1.2V, 1.35V, 1.5V at ±5%	0.950	–	1.575	V
	HDIO bank 3## and bank 4## output driver power supply Includes V_CCO of 1.8V, 2.5V at ±5%, and 3.3V at +3/–5%	1.710	–	3.400	V
	PSIO bank 5## power supplies Includes V_CCO of 1.8V, 2.5V at ±5%, and 3.3V at +3/–5%	1.710	–	3.400	V
V_{CC_PMC} ¹⁰	PMC primary power supply, low (L) voltage	0.676	0.700	0.724	V
	PMC primary power supply, mid (M) voltage	0.775	0.800	0.825	V
	PMC primary power supply, high (H) voltage	0.854	0.880	0.906	V
	PMC primary power supply, overdrive voltage for higher PMC performance in -1LSI and -1LLI devices	0.854	0.880	0.906	V
V_{CC_PSFP}	PS full-power domain power supply, low (L) voltage	0.676	0.700	0.724	V
	PS full-power domain power supply, mid (M) voltage	0.775	0.800	0.825	V
	PS full-power domain power supply, high (H) voltage	0.854	0.880	0.906	V
	PS full-power domain power supply, overdrive voltage for higher PS performance in -1LSI and -1LLI devices	0.854	0.880	0.906	V
V_{CC_PSLP}	PS low-power domain power supply, low (L) voltage	0.676	0.700	0.724	V
	PS low-power domain power supply, mid (M) voltage	0.775	0.800	0.825	V
	PS low-power domain power supply, high (H) voltage	0.854	0.880	0.906	V
	PS low-power domain power supply, overdrive voltage for higher PS performance in -1LSI and -1LLI devices	0.854	0.880	0.906	V
V_{CC_RAM}	PL RAM and clocking network power supply, low (L) and mid (M) voltage	0.775	0.800	0.825	V
V_{CC_RAM}	PL RAM and clocking network power supply, high (H) voltage	0.854	0.880	0.906	V
V_{CC_SOC} ⁸	Network on Chip (NoC) , DDR memory controller, and video decoder unit (VDU) power supply, low (L) and mid (M) voltage	0.775	0.800	0.825	V
V_{CC_SOC} ⁸	NoC , DDR memory controller, and VDU power supply, high (H) voltage	0.854	0.880	0.906	V
V_{GTY_AVCC} ¹¹	GTY transceiver primary analog power supply	0.854	0.880	0.906	V
V_{GTYP_AVCC} ¹¹	GTYP transceiver primary analog power supply (E or I temperature range)	0.892	0.920	0.948	V
V_{GTYP_AVCC} ¹¹	GTYP transceiver primary analog power supply (M or Q temperature range)	0.854	0.880	0.906	V
V_{GTY_AVCCAUX} ¹¹ V_{GTYP_AVCCAUX} ¹¹	GTY and GTYP transceiver auxiliary analog (PLL) power supply	1.455	1.500	1.545	V
V_{GTY_AVTT} ¹¹ V_{GTYP_AVTT} ¹¹	GTY and GTYP transceiver termination power supply	1.164	1.200	1.236	V
V_{GTY_AVTTRCAL} ¹¹ V_{GTYP_AVTTRCAL} ¹¹	GTY and GTYP transceiver analog resistor calibration power supply	1.164	1.200	1.236	V
V_IN ^12,13	I/O input voltage for PSIO, HDIO, and XPIO banks	–0.200	–	V_CCO + 0.200	V
I_IN ¹⁴	Maximum current through any PL, PMC, or PS pin in a powered or unpowered bank when forward biasing the clamp diode	–	–	10	mA
T_j ¹⁵	Junction temperature operating range for extended (E) temperature devices¹⁶	0	–	100	°C
	Junction temperature operating range for industrial (I) temperature devices¹⁶	–40	–	100	°C
	Junction temperature operating range for eFUSE programming	–40	–	125	°C
All voltages are relative to GND and in relation to the BGA package ball. For the design of the power distribution system consult the Versal Adaptive SoC PCB Design User Guide (UG863) and Power Design Manager (PDM) tool (download at www.xilinx.com/power). Each voltage listed requires decoupling as described in the Versal Adaptive SoC PCB Design User Guide (UG863). Refer to the Power Design Manager (PDM) tool (download at www.xilinx.com/power) for design specific decoupling recommendations. V_{CCAUX_SMON} must be connected to V_{CCAUX_PMC} . See Versal Adaptive SoC System Monitor Architecture Manual (AM006) for V_{CCAUX_SMON} information and filter considerations. When the battery-backed RAM and the real-time clock are not used, connect to GND. V_{CC_FUSE} must be within the recommended operating conditions during eFUSE programming. When V_{CC_FUSE} is not used, connect to GND. The -2LLI devices require the V_CCINT supply to power on at 0.725V and then use the PMC dynamic voltage scaling (DVS) drivers to change the voltage of the V_CCINT voltage regulator (using the I2C/PMBus) to 0.700V when the device temperature rises above 25°C or to 0.725V when the device temperature falls below 10°C. V_{CC_IO} must be connected to V_{CC_SOC}. For XPIO and HDIO operation, see the Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010). PSIO includes PMC dedicated I/O banks, PMC MIO banks, and LPD MIO banks. For PSIO operation, see the Versal Adaptive SoC Technical Reference Manual (AM011) . The physical unclonable function (PUF) is only supported when using a nominal V_{CC_PMC} of 0.70V on certain Versal devices . Refer to the Versal Adaptive SoC Security Manual (UG1508) in the Design Security Lounge for a list of affected devices and for detailed information on PUF usage, including a V_{CC_PMC} 0.70V solution for mid, high, and overdrive. When using a V_{CC_PMC} 0.70V solution, performance is reduced for functions based on the V_{CC_PMC}. Each voltage listed requires filtering as described in the Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002) . The noise beyond the recommended operating conditions at the power pins must not exceed 10 mVpp over the band from 10 kHz to 80 MHz. The lower absolute voltage specification always applies. In XPIO banks, V_IN overshoot above V_CCO and undershoot below GND can reduce the performance of V_REF-based receivers within the same nibble. A total of 200 mA per bank should not be exceeded. Junction temperature specification is in relation to the absolute value reported by the PMC system monitor. Devices labeled with the -2E speed/temperature grade and all industrial (I) temperature grade devices can operate for a limited time at a junction temperature between 100°C and 110°C based on the temperature read from the SYSMON. Timing parameters adhere to the same speed file at up to 110°C as they do at up to 100°C. Operation up to T_j = 110°C is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of the device lifetime. For more information on excursion temperature see Extending the Thermal Solution by Utilizing Excursion Temperatures (WP517).