PS and PMC Interface Specifications

Versal AI Edge Series Data Sheet: DC and AC Switching Characteristics (DS958)

Document ID: DS958
Release Date: 2024-11-22
Revision: 1.10 English

Summary
DC Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Available Speed Grades and Operating Voltages
DC Characteristics Over Recommended Operating Conditions
VIN Maximum Allowed AC Voltage Overshoot and Undershoot
DC Input and Output Levels
PSIO Levels
SelectIO Levels
LVDS DC Specifications (LVDS15)
Power Supply Requirements
AC Switching Characteristics
Testing of AC Switching Characteristics
Speed Grade Designations
Production Silicon and Software Status
Device Identification
Processing System Performance Characteristics
PS and PMC Switching Characteristics
Clocks and Reset
PMC JTAG and SelectMAP
PS and PMC Interface Specifications
PMC Quad-SPI Controller Interface
PMC Octal-SPI Controller Interface
PS SPI Controller Interface
PS USB Controller Interface
PS Gigabit Ethernet MAC Controller Interface
PMC SD/SDIO Controller Interface
PMC eMMC Controller Interface
PS and PMC I2C Controller Interface
PS CAN FD Controller Interface
PS UART Controller Interface
PS General Purpose I/O Interface
PS Trace Interface
PS Triple-timer Counter Interface
PS System Watchdog Timer Interface
PMC System Monitor Specifications
Network on Chip Switching Characteristics
Programmable Logic Performance Characteristics
Programmable Logic Switching Characteristics
Block RAM Switching Characteristics
UltraRAM Switching Characteristics
Accelerator RAM Switching Characteristics
Input/Output Delay Switching Characteristics
DSP58 Switching Characteristics
Clock Buffers and Networks
MMCM Switching Characteristics
DPLL Switching Characteristics
XPLL Switching Characteristics
Device Pin-to-Pin Output Parameter Guidelines
Device Pin-to-Pin Input Parameter Guidelines
Package Parameter Guidelines
DDR4 and LPDDR4/4X Memory Interface Controller
AI Engine Switching Characteristics
GTY and GTYP Transceiver Specifications
GTY and GTYP Transceiver DC Input and Output Levels
GTY and GTYP Transceiver Switching Characteristics
GTY and GTYP Transceiver Performance
GTY and GTYP Transceiver Configuration Interface Port Switching Characteristics
GTY and GTYP Transceiver Reference Clock Switching Characteristics
GTY and GTYP Transceiver Reference Clock Oscillator Selection Phase Noise Mask
GTY and GTYP Transceiver PLL/Lock Time Adaptation
GTY and GTYP Transceiver Digital Monitor Clock
GTY and GTYP Transceiver User Clock Switching Characteristics
GTY and GTYP Transceiver Transmitter and Receiver Switching Characteristics
GTY and GTYP Transceiver Electrical Compliance
Integrated Block for MRMAC
Programmable Logic Integrated Block for PCIe
Integrated Blocks for PCIe with DMA and Cache Coherent Interconnect (CPM)
Video Decoder Engines Performance
Revision History
Please Read: Important Legal Notices

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