Recommended Operating Conditions - DS930

Spartan UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS930)
Document ID
DS930
Release Date
2025-12-19
Revision
1.2 English
Table 1. Recommended Operating Conditions
Symbol Description 1, 2 Min Typ Max Units

FPGA Logic
VCCINT Internal supply voltage 0.825 0.850 0.876 V
For -1LI (VCCINT = 0.72V) devices: internal supply voltage 0.698 0.720 0.742 V
VCCINT_IO 3

Internal supply voltage for the I/O banks

 0.825 0.850 0.876 V
VCCBRAM 3 Block RAM and UltraRAM supply voltage 0.825 0.850 0.876 V
VCCAUX 8 Auxiliary supply voltage 1.746 1.800 1.854 V
VCCO 4 Supply voltage for HD I/O banks 5 1.164 – 3.400 V
Supply voltage for HP I/O banks and configuration bank 0 6 0.970 – 1.854 V
Supply voltage for XP5IO I/O banks 7 0.970 – 1.545 V
VCCAUX_IO 8 Auxiliary I/O supply voltage. Available as VCCAUX_HDIO for HD I/O banks, VCCAUX_HPIO for HP I/O banks, and VCCAUX_XP5IO for XP5IO banks. 1.746 1.800 1.854 V
VIN 9, 10 I/O input voltage –0.200 – VCCO + 0.200 V
IIN 11

Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode

 – – 10 mA

GTH Transceiver
VMGTAVCC 12

Analog supply voltage for the GTH transceiver

 0.873 0.900 0.927 V
VMGTAVTT 12

Analog supply voltage for the GTH transmitter and receiver termination circuits

 1.164 1.200 1.236 V
VMGTVCCAUX 12

Auxiliary analog QPLL voltage supply for the transceivers

 1.746 1.800 1.854 V
VMGTAVTTRCAL 12

Analog supply voltage for the resistor calibration circuit of the GTH transceiver column

 1.164 1.200 1.236 V

System Monitor
VCCADC

System Monitor supply relative to GNDADC

 1.746 1.800 1.854 V
VREFP

System Monitor externally supplied reference voltage relative to GNDADC

 1.200 1.250 1.300 V

Temperature
Tj 13 Junction temperature operating range for extended (E) temperature devices 0 – 100 °C
Junction temperature operating range for industrial (I) temperature devices –40 – 100 °C
Junction temperature operating range for eFUSE programming 14 –40 – 125 °C
  1. All voltages are relative to GND, assuming supplies are present.
  2. For the design of the power distribution system consult the UltraScale Architecture PCB Design User Guide (UG583).
  3. VCCINT_IO must be connected to VCCBRAM.
  4. For VCCO_0, the recommended nominal operating voltage is 1.5V or 1.8V, and the minimum voltage for power on and during configuration is 1.455V.
  5. Includes VCCO of 1.2V, 1.35V, 1.5V, 1.8V, and 2.5V at ±5%, and 3.3V at +3/–5%.
  6. Includes VCCO of 1.0V, 1.2V, 1.35V, 1.5V, and 1.8V at ±5%.
  7. Includes VCCO of 1.0V, 1.1V, 1.2V, 1.35V, and 1.5V at ±3%.
  8. VCCAUX_IO must be connected to VCCAUX.
  9. The lower absolute voltage specification always applies.
  10. VIN for the POR_OVERRIDE pin is unique. POR_OVERRIDE must be connected to either GND (default) or VCCINT. See TPOR in Configuration Switching Characteristics for additional information.
  11. A total of 200 mA per bank should not be exceeded.
  12. Each voltage listed requires filtering as described in the UltraScale Architecture GTH Transceivers User Guide (UG576) .
  13. AMD recommends measuring the Tj of a device using the system monitor as described in the UltraScale Architecture System Monitor User Guide (UG580). The system monitor temperature measurement errors (that are described in Table 1) must be accounted for in your design. For example, when using the system monitor with an external reference of 1.25V, and when the system monitor reports 97°C, there is a measurement error ±3°C. A reading of 97°C is considered the maximum adjusted Tj (100°C – 3°C = 97°C).
  14. Do not program eFUSE during device configuration (e.g., during configuration, during configuration readback, or when readback CRC is active).