Power Supply Requirements - DS930

Spartan UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS930)
Document ID
DS930
Release Date
2025-12-19
Revision
1.2 English

Table 1 shows the minimum current, in addition to ICCQ maximum, required by each Spartan UltraScale+ FPGA for proper power-on and configuration. If these current minimums are met, the device powers on after all supplies have passed through their power-on reset threshold voltages. The device must not be configured until after VCCINT is applied. Once initialized and configured, use the Power Design Manager (PDM) tool (download at www.amd.com/power) to estimate current drain on these supplies. PDM is also used to estimate power-on current for all supplies.

Table 1. Power-on Current by Device
Device ICCINTMIN ICCBRAMMIN + ICCINT_IOMIN ICCOMIN ICCAUXMIN + ICCAUX_IOMIN Units
XCSU10P 560 155 50 111 mA
XCSU25P 560 155 50 111 mA
XCSU35P 560 155 50 111 mA
XCSU45P          
XCSU60P          
XCSU65P          
XCSU100P          
XCSU150P          
XCSU200P          
Table 2. Power Supply Ramp Time
Symbol Description Min Max Units
TVCCINT Ramp time from GND to 95% of VCCINT 0.2 40 ms
TVCCINT_IO Ramp time from GND to 95% of VCCINT_IO 0.2 40 ms
TVCCO Ramp time from GND to 95% of VCCO 0.2 40 ms
TVCCAUX Ramp time from GND to 95% of VCCAUX 0.2 40 ms
TVCCBRAM Ramp time from GND to 95% of VCCBRAM 0.2 40 ms
TMGTAVCC Ramp time from GND to 95% of VMGTAVCC 0.2 40 ms
TMGTAVTT Ramp time from GND to 95% of VMGTAVTT 0.2 40 ms
TMGTVCCAUX Ramp time from GND to 95% of VMGTVCCAUX 0.2 40 ms