| TIDELAY_RESOLUTION/ TODELAY_RESOLUTION
|
XP5IO PHY IDELAY/ODELAY delay tap resolution |
1.22 to 4.00 |
ps |
| TIDELAY_ERROR/ TODELAY_ERROR
|
XP5IO PHY calibrated delay line error (DELAY_VALUE)
(REFCLK_FREQUENCY = 500 to 1800 MHz)
1
|
–10 to +10 |
Delay Taps |
- For REFCLK_FREQUENCY < 500 MHz,
BISC calibration of the DELAY_VALUE_<0-5> is not guaranteed. Use the TIDELAY_RESOLUTION/TODELAY_RESOLUTION for delay calculations. Refer to the
Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861). IDELAY is used for alignment and
ALIGN_DELAY effects the programmed DELAY_VALUE programming.
|