Processor System (PS) Performance Characteristics - DS926

Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926)
Document ID
DS926
Release Date
2024-12-23
Revision
1.14 English
Table 1. Processor Performance
Symbol Description Speed Grade Units
-2 -1
FAPUMAX Maximum APU clock frequency 1333 1200 MHz
FRPUMAX Maximum RPU clock frequency 533 500 MHz
Table 2. Configuration and Security Unit Performance
Symbol Description Speed Grade Units
-2 -1
FCSUCIBMAX Maximum CSU crypto interface block frequency 400 400 MHz
Table 3. PS DDR Performance
Memory Standard DRAM Type Speed Grade Units
-2E/-2LE

-1E

 -2I/-2LI

-1I/-1M/-1LI
Min Max Min Max
DDR4 3 1-rank component 664 2400 1000 2400 Mb/s
1-rank DIMM 1

2-rank component w/dual-rank package

 664 2133 1000 2133 Mb/s
2-rank DIMM 1, 2

2-rank component w/single-rank package

 664 1866 1000 1866 Mb/s
LPDDR4 4 1-rank component 5 664 2400 1000 2400 Mb/s
2-rank component w/dual-rank package 5 664 2133 1000 2133 Mb/s
DDR3 1-rank component 664 2133 1000 2133 Mb/s
1-rank DIMM 1

2-rank component w/dual-rank package

 664 1866 1000 1866 Mb/s
2-rank DIMM 1, 2

2-rank component w/single-rank package

 664 1600 1000 1600 Mb/s
DDR3L 1-rank component 664 1866 1000 1866 Mb/s
1-rank DIMM 1

2-rank component w/dual-rank package

 664 1600 1000 1600 Mb/s
2-rank DIMM 1, 2

2-rank component w/single-rank package

 664 1333 1000 1333 Mb/s
LPDDR3 7 1-rank component 6 664 1600 1000 1600 Mb/s
2-rank component w/dual-rank package 6 664 1333 1000 1333 Mb/s
  1. Dual in-line memory module (DIMM) includes RDIMM, SODIMM, and UDIMM.
  2. Includes: 2-rank 1-slot.
  3. The JEDEC JESD79-4C standard for DDR4 SDRAM limits the maximum tCK to 1.6 ns. Because of this limitation, AMD recommends working with your DRAM vendor to verify support for data rates at or less than 1066 Mb/s.
  4. LPDDR4 support is only available as a 32-bit interface. Byte-mode LPDDR4 devices are not supported.
  5. LPDDR4 1-rank component with ECC is limited to the performance specified for the LPDDR4 2-rank component.
  6. 64-bit LPDDR3 interface performance values are defined without ECC support.
  7. LPDDR3 quad-die package devices are not supported.
Table 4. PS NAND NV-DDR Synchronous Performance
Memory Standard Mode Speed Grade Units
-2 -1
Max Max
NV-DDR 1 5 200 200 Mb/s
4 166.6 166.6 Mb/s
3 133.3 133.3 Mb/s
2 100 100 Mb/s
1 66.6 66.6 Mb/s
0 40 40 Mb/s
  1. The PS NAND memory controller interface for NV-DDR switching characteristics meets the requirements of the ONFI 3.1 specification.
Table 5. PS NAND SDR Asynchronous Performance
Memory Standard Mode Speed Grade Units
-2 -1
Max Max
SDR 1, 2 5 50 50 Mb/s
4 40 40 Mb/s
3 33.3 33.3 Mb/s
2 28.5 28.5 Mb/s
1 20 20 Mb/s
0 10 10 Mb/s
  1. The PS NAND memory controller interface for SDR switching characteristics meets the requirements of the ONFI 3.1 specification.
  2. The NAND controller reference clock frequency maximum is 83 MHz.
Table 6. PS-PL Interface Performance
Symbol Description Min Max Units
FEMIOGEMCLK EMIO gigabit Ethernet controller maximum frequency – 125 MHz
FEMIOSDCLK EMIO SD controller maximum frequency – 25 MHz
FEMIOSPICLK EMIO SPI controller maximum frequency – 25 MHz
FEMIOTRACECLK EMIO trace controller maximum frequency – 125 MHz
FFCIDMACLK Flow control interface DMA maximum frequency – 333 MHz
FAXICLK Maximum AXI interface performance – 333 MHz
FDPLIVEVIDEO DisplayPort controller live video interface maximum frequency – 300 MHz