PS Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925)

Document ID: DS925
Release Date: 2024-07-12
Revision: 1.27 English

Summary
DC Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Available Speed Grades and Operating Voltages
DC Characteristics Over Recommended Operating Conditions
VIN Maximum Allowed AC Voltage Overshoot and Undershoot
Quiescent Supply Current
Power Supply Sequencing
PS Power-On/Off Power Supply Sequencing
PL Power-On/Off Power Supply Sequencing
PS-PL Power Sequencing
Power Supply Requirements
DC Input and Output Levels
PS I/O Levels
PL I/O Levels
LVDS DC Specifications (LVDS_25)
LVDS DC Specifications (LVDS)
AC Switching Characteristics
Testing of AC Switching Characteristics
Speed Grade Designations
Production Silicon and Software Status
Processor System (PS) Performance Characteristics
PS Switching Characteristics
PS Clocks
PS Configuration
PS Interface Specifications
PS Quad-SPI Controller Interface
PS USB Interface
PS Gigabit Ethernet Controller Interface
PS SD/SDIO Controller Interface
PS eMMC Standard Interface
PS I2C Controller Interface
PS SPI Controller Interface
PS CAN Controller Interface
PS DAP Interface
PS UART Interface
PS General Purpose I/O Interface
PS Trace Interface
PS Triple-timer Counter Interface
PS Watchdog Timer Interface
PS-GTR Transceiver
PS System Monitor Specifications
Programmable Logic (PL) Performance Characteristics
Programmable Logic (PL) Switching Characteristics
IOB High Density (HD) Switching Characteristics
IOB High Performance (HP) Switching Characteristics
IOB 3-state Output Switching Characteristics
Input Delay Measurement Methodology
Output Delay Measurement Methodology
Block RAM and FIFO Switching Characteristics
UltraRAM Switching Characteristics
Input/Output Delay Switching Characteristics
DSP48 Slice Switching Characteristics
Clock Buffers and Networks
MMCM Switching Characteristics
PLL Switching Characteristics
Device Pin-to-Pin Output Parameter Guidelines
Device Pin-to-Pin Input Parameter Guidelines
Package Parameter Guidelines
GTH Transceiver Specifications
GTH Transceiver DC Input and Output Levels
GTH Transceiver Switching Characteristics
GTH Transceiver Electrical Compliance
GTY Transceiver Specifications
GTY Transceiver DC Input and Output Levels
GTY Transceiver Switching Characteristics
GTY Transceiver Electrical Compliance
Integrated Interface Block for Interlaken
Integrated Interface Block for 100G Ethernet MAC and PCS
Integrated Interface Block for PCI Express Designs
Video Codec Performance
PL System Monitor Specifications
PL SYSMON I2C/PMBus Interfaces
Configuration Switching Characteristics
Revision History
Please Read: Important Legal Notices

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