PS Power-On/Off Power Supply Sequencing

The low-power domain (LPD) must operate before the full-power domain (FPD) can function. The low-power and full-power domains can be powered simultaneously. The PS_POR_B input must be asserted to GND during the power-on sequence (see Table 4). The FPD (when used) must be powered before PS_POR_B is released.

To achieve minimum current draw at power-on, the recommended power-on sequence for the low-power domain (LPD) is listed. The recommended power-off sequence is the reverse of the power-on sequence.

1. V_{CC_PSINTLP}
2. V_{CC_PSAUX}, V_{CC_PSADC}, and V_{CC_PSPLL} in any order or simultaneously.
3. V_{CCO_PSIO}

To achieve minimum current draw at power-on, the recommended power-on sequence for the full-power domain (FPD) is listed. The recommended power-off sequence is the reverse of the power-on sequence.

1. V_{CC_PSINTFP} and V_{CC_PSINTFP_DDR} driven from the same supply source.
2. V_{PS_MGTRAVCC} and V_{CC_PSDDR_PLL} in any order or simultaneously.
3. V_{PS_MGTRAVTT} and V_{CCO_PSDDR} in any order or simultaneously.