PS I2C Controller Interface

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925)
Document ID
DS925
Release Date
2024-07-12
Revision
1.27 English
Table 1. I2C Interface
Symbol Description 1 Min Max Units
I2C Fast-mode Interface
TI2CFCKL SCL Low time 1.3 – µs
TI2CFCKH SCL High time 0.6 – µs
TI2CFCKO SDA clock to out delay – 900 ns
TI2CFDCK SDA input setup time 100 – ns
FI2CFCLK SCL clock frequency – 400 KHz
I2C Standard-mode Interface
TI2CSCKL SCL Low time 4.7 – µs
TI2CSCKH SCL High time 4.0 – µs
TI2CSCKO SDA clock to out delay – 3450 ns
TI2CSDCK SDA input setup time 250 – ns
FI2CSCLK SCL clock frequency – 100 KHz
  1. The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load.