VCCO + 0.30 |
100% |
–0.30 |
100% |
VCCO + 0.35 |
100% |
–0.35 |
90% |
VCCO + 0.40 |
100% |
–0.40 |
78% |
VCCO + 0.45 |
100% |
–0.45 |
40% |
VCCO + 0.50 |
100% |
–0.50 |
24% |
VCCO + 0.55 |
100% |
–0.55 |
18.0% |
VCCO + 0.60 |
100% |
–0.60 |
13.0% |
VCCO + 0.65 |
100% |
–0.65 |
10.8% |
VCCO + 0.70 |
92% |
–0.70 |
9.0% |
VCCO + 0.75 |
92% |
–0.75 |
7.0% |
VCCO + 0.80 |
92% |
–0.80 |
6.0% |
VCCO + 0.85 |
92% |
–0.85 |
5.0% |
VCCO + 0.90 |
92% |
–0.90 |
4.0% |
VCCO + 0.95 |
92% |
–0.95 |
2.5% |
- A total of 200 mA per bank should not be
exceeded.
- For UI smaller than 20 µs.
- For
the -1M devices, the temperature limits are –55°C to 125°C.
|