System Monitor Specifications - DS923

Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
Document ID
DS923
Release Date
2024-08-09
Revision
1.20 English
Table 1. System Monitor Specifications
Parameter Symbol Comments/Conditions Min Typ Max Units
VCCADC = 1.8V ±3%, VREFP = 1.25V, VREFN = 0V, ADCCLK = 5.2 MHz, Tj = –40°C to 100°C, typical values at Tj = 40°C
ADC Accuracy 1
Resolution 10 – – Bits
Integral nonlinearity 2 INL   – – ±1.5 LSBs
Differential nonlinearity DNL No missing codes, guaranteed monotonic – – ±1 LSBs
Offset error Offset calibration enabled – – ±2 LSBs
Gain error – – ±0.4 %
Sample rate – – 0.2 MS/s
RMS code noise External 1.25V reference – – 1 LSBs
On-chip reference – 1 – LSBs
ADC Accuracy at Extended Temperatures
Resolution Tj = –55°C to 125°C 10 – – Bits
Integral nonlinearity 2 INL Tj = –55°C to 125°C – – ±1.5 LSBs
Differential nonlinearity DNL No missing codes, guaranteed monotonic

Tj = –55°C to 125°C

 – – ±1
Analog Inputs 2
ADC input ranges Unipolar operation 0 – 1 V
Bipolar operation –0.5 – +0.5 V
Unipolar common mode range (FS input) 0 – +0.5 V
Bipolar common mode range (FS input) +0.5 – +0.6 V
Maximum external channel input ranges Adjacent channels set within these ranges should not corrupt measurements on adjacent channels –0.1 – VCCADC V
On-Chip Sensor Accuracy
Temperature sensor error 1, 3 Tj = –55°C to 125°C (with external REF) – – ±3 °C
Tj = –55°C to 110°C (with internal REF) – – ±3.5 °C
Tj = 110°C to 125°C (with internal REF) – – ±5 °C
Supply sensor error 4

Supply voltages 0.72V to 1.2V,

Tj = –40°C to 100°C (with external REF)

 – – ±0.5 %

Supply voltages 0.72V to 1.2V,

Tj = –55°C to 125°C (with external REF)

 – – ±1.0 %

All other supply voltages,

Tj = –40°C to 100°C (with external REF)

 – – ±1.0 %

All other supply voltages,

Tj = –55°C to 125°C (with external REF)

 – – ±2.0 %

Supply voltages 0.72V to 1.2V,

Tj = –40°C to 100°C (with internal REF)

 – – ±1.0 %

Supply voltages 0.72V to 1.2V,

Tj = –55°C to 125°C (with internal REF)

 – – ±2.0 %

All other supply voltages,

Tj = –40°C to 100°C (with internal REF)

 – – ±1.5 %

All other supply voltages,

Tj = –55°C to 125°C (with internal REF)

 – – ±2.5 %
Conversion Rate 5
Conversion time—continuous tCONV Number of ADCCLK cycles 26 – 32 Cycles
Conversion time—event tCONV Number of ADCCLK cycles – – 21 Cycles
DRP clock frequency DCLK DRP clock frequency 8 – 250 MHz
ADC clock frequency ADCCLK Derived from DCLK 1 – 5.2 MHz
DCLK duty cycle 40 – 60 %
SYSMON Reference 6
External reference VREFP Externally supplied reference voltage 1.20 1.25 1.30 V
On-chip reference Ground VREFP pin to AGND, Tj = –40°C to 100°C 1.2375 1.25 1.2625 V
Ground VREFP pin to AGND, Tj = –55°C to 125°C 1.225 1.25 1.275 V
  1. ADC offset errors are removed by enabling the ADC automatic offset calibration feature. The values are specified for when this feature is enabled.
  2. See the Analog Input section in the UltraScale Architecture System Monitor User Guide (UG580).
  3. When reading temperature values directly from the PMBus interface, the SYSMON has a +4°C offset due to the transfer function used by the PMBus application. For example, the external REF temperature sensor error’s range of ±3°C becomes +1°C to +7°C when the temperature is read through the PMBus interface.
  4. Supply sensor offset and gain errors are removed by enabling the automatic offset and gain calibration feature. The values are specified for when this feature is enabled.
  5. See the Adjusting the Acquisition Settling Time section in the UltraScale Architecture System Monitor User Guide (UG580).
  6. Any variation in the reference voltage from the nominal VREFP = 1.25V and VREFN = 0V will result in a deviation from the ideal transfer function. This also impacts the accuracy of the internal sensor measurements (i.e., temperature and power supply). However, for external ratiometric type applications allowing reference to vary by ±4% is permitted.