IOB High Density (HD) Switching Characteristics

Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
Document ID
DS923
Release Date
2024-08-09
Revision
1.20 English
Table 1. IOB High Density (HD) Switching Characteristics
I/O Standards TINBUF_DELAY_PAD_I TOUTBUF_DELAY_O_PAD TOUTBUF_DELAY_TD_PAD Units
0.90V 0.85V 0.72V 0.90V 0.85V 0.72V 0.90V 0.85V 0.72V
-3 -2 -1 -2 -3 -2 -1 -2 -3 -2 -1 -2
DIFF_HSTL_I_18_F 0.873 0.978 1.058 0.978 1.510 1.574 1.718 1.966 1.160 1.160 1.271 1.515 ns
DIFF_HSTL_I_18_S 0.873 0.978 1.058 0.978 1.742 1.805 1.950 2.197 1.748 1.748 1.867 2.103 ns
DIFF_HSTL_I_F 0.873 0.978 1.058 0.978 1.563 1.611 1.762 2.003 1.313 1.313 1.417 1.668 ns
DIFF_HSTL_I_S 0.873 0.978 1.058 0.978 1.696 1.798 1.913 2.190 1.630 1.630 1.780 1.985 ns
DIFF_HSUL_12_F 0.796 0.911 0.977 0.911 1.493 1.573 1.703 1.965 1.222 1.222 1.335 1.577 ns
DIFF_HSUL_12_S 0.796 0.911 0.977 0.911 1.653 1.711 1.864 2.103 1.536 1.536 1.665 1.891 ns
DIFF_SSTL12_F 0.796 0.906 0.977 0.906 1.577 1.643 1.792 2.035 1.285 1.285 1.423 1.640 ns
DIFF_SSTL12_S 0.796 0.906 0.977 0.906 1.726 1.784 1.948 2.176 1.567 1.567 1.706 1.922 ns
DIFF_SSTL135_F 0.807 0.927 0.995 0.927 1.558 1.625 1.765 2.017 1.341 1.341 1.458 1.696 ns
DIFF_SSTL135_II_F 0.807 0.927 0.995 0.927 1.560 1.623 1.770 2.015 1.325 1.325 1.470 1.680 ns
DIFF_SSTL135_II_S 0.807 0.927 0.995 0.927 1.694 1.768 1.916 2.160 1.722 1.722 1.911 2.077 ns
DIFF_SSTL135_S 0.807 0.927 0.995 0.927 1.796 1.869 2.025 2.261 1.814 1.814 1.976 2.169 ns
DIFF_SSTL15_F 0.840 0.928 1.020 0.928 1.559 1.628 1.771 2.020 1.374 1.374 1.483 1.729 ns
DIFF_SSTL15_II_F 0.840 0.928 1.020 0.928 1.574 1.622 1.778 2.014 1.356 1.356 1.442 1.711 ns
DIFF_SSTL15_II_S 0.840 0.928 1.020 0.928 1.769 1.821 1.987 2.213 1.895 1.895 2.047 2.250 ns
DIFF_SSTL15_S 0.840 0.928 1.020 0.928 1.752 1.824 1.977 2.216 1.743 1.743 1.907 2.098 ns
DIFF_SSTL18_II_F 0.873 0.961 1.038 0.961 1.672 1.729 1.880 2.121 1.377 1.377 1.492 1.732 ns
DIFF_SSTL18_II_S 0.873 0.961 1.038 0.961 1.748 1.796 1.965 2.188 1.616 1.616 1.800 1.971 ns
DIFF_SSTL18_I_F 0.873 0.961 1.038 0.961 1.539 1.609 1.755 2.001 1.220 1.220 1.313 1.575 ns
DIFF_SSTL18_I_S 0.873 0.961 1.038 0.961 1.728 1.786 1.942 2.178 1.677 1.677 1.836 2.032 ns
HSTL_I_18_F 0.854 0.947 1.021 0.947 1.510 1.574 1.718 1.966 1.160 1.160 1.271 1.515 ns
HSTL_I_18_S 0.854 0.947 1.021 0.947 1.742 1.805 1.950 2.197 1.748 1.748 1.867 2.103 ns
HSTL_I_F 0.748 0.856 0.900 0.856 1.563 1.611 1.762 2.003 1.313 1.313 1.417 1.668 ns
HSTL_I_S 0.748 0.856 0.900 0.856 1.696 1.798 1.913 2.190 1.630 1.630 1.780 1.985 ns
HSUL_12_F 0.712 0.780 0.867 0.780 1.493 1.573 1.703 1.965 1.222 1.222 1.335 1.577 ns
HSUL_12_S 0.712 0.780 0.867 0.780 1.653 1.711 1.864 2.103 1.536 1.536 1.665 1.891 ns
LVCMOS12_F_12 0.761 0.918 0.976 0.918 1.652 1.689 1.856 2.081 1.202 1.202 1.317 1.557 ns
LVCMOS12_F_4 0.761 0.918 0.976 0.918 1.714 1.742 1.922 2.134 1.353 1.353 1.478 1.708 ns
LVCMOS12_F_8 0.761 0.918 0.976 0.918 1.668 1.714 1.879 2.106 1.292 1.292 1.432 1.647 ns
LVCMOS12_S_12 0.761 0.918 0.976 0.918 2.019 2.073 2.247 2.465 1.581 1.581 1.717 1.936 ns
LVCMOS12_S_4 0.761 0.918 0.976 0.918 1.979 1.979 2.182 2.371 1.633 1.633 1.772 1.988 ns
LVCMOS12_S_8 0.761 0.918 0.976 0.918 2.132 2.205 2.406 2.597 1.767 1.767 1.928 2.122 ns
LVCMOS15_F_12 0.775 0.905 0.958 0.905 1.691 1.713 1.892 2.105 1.275 1.275 1.428 1.630 ns
LVCMOS15_F_16 0.775 0.905 0.958 0.905 1.665 1.722 1.881 2.114 1.260 1.260 1.407 1.615 ns
LVCMOS15_F_4 0.775 0.905 0.958 0.905 1.747 1.825 1.959 2.217 1.453 1.453 1.557 1.808 ns
LVCMOS15_F_8 0.775 0.905 0.958 0.905 1.721 1.778 1.930 2.170 1.378 1.378 1.458 1.733 ns
LVCMOS15_S_12 0.775 0.905 0.958 0.905 1.936 1.991 2.139 2.383 1.516 1.516 1.648 1.871 ns
LVCMOS15_S_16 0.775 0.905 0.958 0.905 2.172 2.172 2.389 2.564 1.707 1.707 1.888 2.062 ns
LVCMOS15_S_4 0.775 0.905 0.958 0.905 2.274 2.313 2.483 2.705 1.952 1.952 2.123 2.307 ns
LVCMOS15_S_8 0.775 0.905 0.958 0.905 2.170 2.170 2.400 2.562 1.817 1.817 1.984 2.172 ns
LVCMOS18_F_12 0.810 0.915 0.958 0.915 1.741 1.805 1.962 2.197 1.383 1.383 1.471 1.738 ns
LVCMOS18_F_16 0.810 0.915 0.958 0.915 1.698 1.785 1.917 2.177 1.338 1.338 1.446 1.693 ns
LVCMOS18_F_4 0.810 0.915 0.958 0.915 1.815 1.868 2.013 2.260 1.472 1.472 1.599 1.827 ns
LVCMOS18_F_8 0.810 0.915 0.958 0.915 1.785 1.797 1.979 2.189 1.384 1.384 1.487 1.739 ns
LVCMOS18_S_12 0.810 0.915 0.958 0.915 2.163 2.201 2.408 2.593 1.762 1.762 1.894 2.117 ns
LVCMOS18_S_16 0.810 0.915 0.958 0.915 2.102 2.173 2.362 2.565 1.702 1.702 1.834 2.057 ns
LVCMOS18_S_4 0.810 0.915 0.958 0.915 2.342 2.346 2.567 2.738 1.951 1.951 2.092 2.306 ns
LVCMOS18_S_8 0.810 0.915 0.958 0.915 2.275 2.292 2.511 2.684 1.848 1.848 2.008 2.203 ns
LVCMOS25_F_12 0.963 0.988 1.042 0.988 2.153 2.153 2.453 2.545 1.692 1.692 1.856 2.047 ns
LVCMOS25_F_16 0.963 0.988 1.042 0.988 2.105 2.105 2.406 2.497 1.623 1.623 1.786 1.978 ns
LVCMOS25_F_4 0.963 0.988 1.042 0.988 2.317 2.344 2.554 2.736 1.842 1.842 2.039 2.197 ns
LVCMOS25_F_8 0.963 0.988 1.042 0.988 2.184 2.184 2.516 2.576 1.726 1.726 1.910 2.081 ns
LVCMOS25_S_12 0.963 0.988 1.042 0.988 2.550 2.558 2.840 2.950 1.971 1.971 2.194 2.326 ns
LVCMOS25_S_16 0.963 0.988 1.042 0.988 2.449 2.449 2.740 2.841 1.852 1.852 2.063 2.207 ns
LVCMOS25_S_4 0.963 0.988 1.042 0.988 2.770 2.770 3.066 3.162 2.224 2.224 2.458 2.579 ns
LVCMOS25_S_8 0.963 0.988 1.042 0.988 2.663 2.663 2.963 3.055 2.091 2.091 2.373 2.446 ns
LVCMOS33_F_12 1.154 1.154 1.213 1.154 2.415 2.415 2.651 2.807 1.754 1.754 1.915 2.109 ns
LVCMOS33_F_16 1.154 1.154 1.213 1.154 2.381 2.383 2.603 2.775 1.734 1.734 1.869 2.089 ns
LVCMOS33_F_4 1.154 1.154 1.213 1.154 2.541 2.541 2.765 2.933 1.932 1.932 2.135 2.287 ns
LVCMOS33_F_8 1.154 1.154 1.213 1.154 2.603 2.603 2.822 2.995 1.937 1.937 2.130 2.292 ns
LVCMOS33_S_12 1.154 1.154 1.213 1.154 2.705 2.705 3.047 3.097 2.049 2.049 2.318 2.404 ns
LVCMOS33_S_16 1.154 1.154 1.213 1.154 2.714 2.714 3.024 3.106 2.028 2.028 2.232 2.383 ns
LVCMOS33_S_4 1.154 1.154 1.213 1.154 2.999 2.999 3.340 3.391 2.320 2.320 2.610 2.675 ns
LVCMOS33_S_8 1.154 1.154 1.213 1.154 2.929 2.929 3.260 3.321 2.260 2.260 2.532 2.615 ns
LVDS_25 0.980 1.003 1.116 1.003 N/A N/A N/A N/A N/A N/A N/A N/A ns
LVPECL 0.980 1.003 1.116 1.003 N/A N/A N/A N/A N/A N/A N/A N/A ns
LVTTL_F_12 1.164 1.164 1.223 1.164 2.415 2.415 2.651 2.807 1.754 1.754 1.915 2.109 ns
LVTTL_F_16 1.164 1.164 1.223 1.164 2.464 2.464 2.732 2.856 1.750 1.750 1.986 2.105 ns
LVTTL_F_4 1.164 1.164 1.223 1.164 2.541 2.541 2.765 2.933 1.932 1.932 2.135 2.287 ns
LVTTL_F_8 1.164 1.164 1.223 1.164 2.582 2.582 2.787 2.974 1.910 1.910 2.063 2.265 ns
LVTTL_S_12 1.164 1.164 1.223 1.164 2.731 2.731 3.075 3.123 2.072 2.072 2.343 2.427 ns
LVTTL_S_16 1.164 1.164 1.223 1.164 2.714 2.714 3.024 3.106 2.028 2.028 2.232 2.383 ns
LVTTL_S_4 1.164 1.164 1.223 1.164 2.999 2.999 3.340 3.391 2.320 2.320 2.610 2.675 ns
LVTTL_S_8 1.164 1.164 1.223 1.164 2.929 2.929 3.260 3.321 2.260 2.260 2.532 2.615 ns
SLVS_400_25 0.998 1.020 1.136 1.020 N/A N/A N/A N/A N/A N/A N/A N/A ns
SSTL12_F 0.712 0.780 0.867 0.780 1.577 1.643 1.792 2.035 1.285 1.285 1.423 1.640 ns
SSTL12_S 0.712 0.780 0.867 0.780 1.726 1.784 1.948 2.176 1.567 1.567 1.706 1.922 ns
SSTL135_F 0.731 0.798 0.881 0.798 1.558 1.625 1.765 2.017 1.341 1.341 1.458 1.696 ns
SSTL135_II_F 0.731 0.798 0.881 0.798 1.574 1.623 1.770 2.015 1.325 1.325 1.470 1.680 ns
SSTL135_II_S 0.731 0.798 0.881 0.798 1.694 1.768 1.916 2.160 1.722 1.722 1.911 2.077 ns
SSTL135_S 0.731 0.798 0.881 0.798 1.796 1.869 2.025 2.261 1.814 1.814 1.976 2.169 ns
SSTL15_F 0.731 0.838 0.880 0.838 1.544 1.612 1.754 2.004 1.357 1.357 1.464 1.712 ns
SSTL15_II_F 0.731 0.838 0.880 0.838 1.588 1.622 1.778 2.014 1.356 1.356 1.442 1.711 ns
SSTL15_II_S 0.731 0.838 0.880 0.838 1.769 1.821 1.987 2.213 1.895 1.895 2.047 2.250 ns
SSTL15_S 0.731 0.838 0.880 0.838 1.752 1.824 1.977 2.216 1.743 1.743 1.907 2.098 ns
SSTL18_II_F 0.854 0.947 1.021 0.947 1.699 1.729 1.880 2.121 1.377 1.377 1.492 1.732 ns
SSTL18_II_S 0.854 0.947 1.021 0.947 1.748 1.796 1.965 2.188 1.616 1.616 1.800 1.971 ns
SSTL18_I_F 0.854 0.947 1.021 0.947 1.566 1.609 1.755 2.001 1.220 1.220 1.313 1.575 ns
SSTL18_I_S 0.854 0.947 1.021 0.947 1.745 1.786 1.942 2.178 1.677 1.677 1.836 2.032 ns
SUB_LVDS 0.871 1.002 1.036 1.002 N/A N/A N/A N/A N/A N/A N/A N/A ns