IOB 3-state Output Switching Characteristics

Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)

Document ID

DS923

Release Date

2024-08-09

Revision

1.20 English

Table 1 specifies the values of T_{OUTBUF_DELAY_TE_PAD} and T_{INBUF_DELAY_IBUFDIS_O}.

T_{OUTBUF_DELAY_TE_PAD} is the delay from the T pin to the IOB pad through the output buffer of an IOB pad, when 3-state is enabled (i.e., a high impedance state).
T_{INBUF_DELAY_IBUFDIS_O} is the IOB delay from IBUFDISABLE to O output.
In HP I/O banks, the internal DCI termination turn-off time is always faster than T_{OUTBUF_DELAY_TE_PAD} when the DCITERMDISABLE pin is used.
In HD I/O banks, the internal IN_TERM termination turn-off time is always faster than T_{OUTBUF_DELAY_TE_PAD} when the INTERMDISABLE pin is used.

Table 1. IOB 3-state Output Switching Characteristics
Symbol	Description	Speed Grade and V_CCINT Operating Voltages				Units
		0.90V	0.85V		0.72V
		-3	-2	-1	-2
T_{OUTBUF_DELAY_TE_PAD}	T input to pad high-impedance for HD I/O banks	6.167	6.318	6.369	6.699	ns
T_{OUTBUF_DELAY_TE_PAD}	T input to pad high-impedance for the HP I/O banks	5.330	5.330	5.341	5.330	ns
T_{INBUF_DELAY_IBUFDIS_O}	IBUF turn-on time from IBUFDISABLE to O output for HD I/O banks	2.266	2.266	2.430	2.266	ns
T_{INBUF_DELAY_IBUFDIS_O}	IBUF turn-on time from IBUFDISABLE to O output for the HP I/O banks	0.873	0.936	1.037	0.936	ns