Absolute Maximum Ratings - DS923

Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
Document ID
DS923
Release Date
2024-08-09
Revision
1.20 English
Table 1. Absolute Maximum Ratings
Symbol Description 1 Min Max Units

FPGA Logic
VCCINT Internal supply voltage –0.500 1.000 V
VCCINT_IO 2 Internal supply voltage for the I/O banks –0.500 1.000 V
VCCAUX Auxiliary supply voltage –0.500 2.000 V
VCCBRAM Supply voltage for the block RAM and UltraRAM –0.500 1.000 V
VCCO Output drivers supply voltage for HD I/O banks (VU19P and VU23P only) –0.500 3.400 V
Output drivers supply voltage for HP I/O banks and configuration bank 0 –0.500 2.000 V
VCCAUX_IO 3 Auxiliary supply voltage for the I/O banks –0.500 2.000 V
VREF Input reference voltage for HP I/O banks –0.500 2.000 V
VIN 4, 5 , 6 , 7 I/O input voltage for HD I/O banks (VU19P and VU23P only) –0.550 VCCO + 0.550 V
I/O input voltage for HP I/O banks –0.550 VCCO + 0.550 V
VBATT Key memory battery backup supply –0.500 2.000 V
IDC Available output current at the pad –20 20 mA
IRMS Available RMS output current at the pad –20 20 mA
High Bandwidth Memory (HBM)
VCC_HBM Supply voltage for the high-bandwidth memory –0.300 1.500 V
VCC_IO_HBM I/O supply voltage for the high-bandwidth memory –0.300 1.500 V
VCCAUX_HBM Auxiliary supply voltage for the high-bandwidth memory –0.300 3.000 V
GTY or GTM Transceiver 8
VCCINT_GT Digital supply voltage for select modules in the GTM transceivers –0.500 1.000 V
VMGTAVCC Analog supply voltage for transceiver circuits –0.500 1.000 V
VMGTAVTT Analog supply voltage for transceiver termination circuits –0.500 1.300 V
VMGTVCCAUX Auxiliary analog Quad PLL (QPLL) voltage supply for transceivers –0.500 1.900 V
VMGTREFCLK Transceiver reference clock absolute input voltage –0.500 1.300 V
VMGTAVTTRCAL Analog supply voltage for the resistor calibration circuit of the transceiver column –0.500 1.300 V
VIN Receiver (RXP/RXN) and transmitter (TXP/TXN) absolute input voltage –0.500 1.200 V
IDCIN-FLOAT DC input current for receiver input pins DC coupled RX termination = floating 9 – 10 mA
IDCIN-MGTAVTT DC input current for receiver input pins DC coupled RX termination = VMGTAVTT – 10 mA
IDCIN-GND DC input current for receiver input pins DC coupled RX termination = GND 10 – 0 mA
IDCIN-PROG DC input current for receiver input pins DC coupled RX termination = programmable 11 – 0 mA
IDCOUT-FLOAT DC output current for transmitter pins DC coupled RX termination = floating – 6 mA
IDCOUT-MGTAVTT DC output current for transmitter pins DC coupled RX termination = VMGTAVTT – 6 mA

System Monitor
VCCADC System Monitor supply relative to GNDADC –0.500 2.000 V
VREFP System Monitor reference input relative to GNDADC –0.500 2.000 V

Temperature 12

TSTG Storage temperature for XCVU31P, XCVU33P, XCVU35P, XCVU37P, XCVU45P, XCVU47P, and XCVU57P 13 –55 120 °C
Storage temperature (ambient) for all other devices –65 150 °C
TSOL Maximum dry rework soldering temperature – 260 °C
Maximum reflow soldering temperature for FFVC1517, FLGF1924, FHGA2104, FHGB2104, FHGC2104, FLGA2104, FLGB2104, FLGC2104, FLVA2104, FLVB2104, FLVC2104, FLGA2577 – 245 °C
Maximum reflow soldering temperature for lidless packages with stiffener ring (VSVA1365, FSVJ1760, FIGD2104, FSGD2104, FSVH1924, FSVH2104, FSGA2577, FSVH2892, FSVK2892, FSVA3824, FSVB3824) – 240 °C
Maximum reflow soldering temperature for the FFRC1517, FFRA2104, FFRB2104, and FFRC2104 packages – 225 °C
Tj Maximum junction temperature for XCVU31P, XCVU33P, XCVU35P, XCVU37P, XCVU45P, XCVU47P, and XCVU57P – 120 °C
Maximum junction temperature for all other devices – 125 °C
  1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
  2. VCCINT_IO must be connected to VCCBRAM.
  3. VCCAUX_IO must be connected to VCCAUX.
  4. The lower absolute voltage specification always applies.
  5. For I/O operation, see the UltraScale Architecture SelectIO Resources User Guide (UG571).
  6. When operating outside of the recommended operating conditions, refer to Table 1 and Table 2 for maximum overshoot and undershoot specifications.
  7. VIN for the POR_OVERRIDE pin is unique. POR_OVERRIDE must be connected to either GND (default) or VCCINT. See TPOR in Configuration Switching Characteristics for additional information.
  8. For more information on supported GTY transceiver terminations see the UltraScale Architecture GTY Transceivers User Guide (UG578) or Virtex UltraScale+ FPGAs GTM Transceivers User Guide (UG581).
  9. AC coupled operation is not supported for RX termination = floating.
  10. For GTY transceivers, DC coupled operation is not supported for RX termination = GND.
  11. DC coupled operation is not supported for RX termination = programmable.
  12. For soldering guidelines and thermal considerations, see the UltraScale and UltraScale+ FPGAs Packaging and Pinouts Product Specification (UG575).
  13. For devices with high-bandwidth memory (HBM), the storage temperature is the case surface temperature on the center/top side of the device. For the measurement conditions, refer to the JESD51-2 standard.