Package Parameter Guidelines

Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics (DS922)

Document ID

DS922

Release Date

2024-08-09

Revision

1.18 English

The parameters in this section provide the necessary values for calculating timing budgets for clock transmitter and receiver data-valid windows.

Table 1. Package Skew
Symbol	Description	Device	Package	Value	Units
PKGSKEW	Package Skew^{1, 2}	XCKU3P	SFVB784	75	ps
			FFVA676	136	ps
			FFVB676	69	ps
			FFVD900	179	ps
		XCKU5P	SFVB784	75	ps
			FFVA676	136	ps
			FFVB676	69	ps
			FFVD900	179	ps
		XCKU9P	FFVE900	212	ps
		XCKU11P	FFVD900	146	ps
			FFVA1156	170	ps
			FFVE1517	178	ps
		XCKU13P	FFVE900	197	ps
		XCKU15P	FFVA1156	203	ps
			FFVE1517	167	ps
			FFVA1760	191	ps
			FFVE1760	172	ps
		XCKU19P	FFVJ1760	187	ps
		XCKU19P	FFVB2104	196	ps
		XQKU5P	FFRB676	70	ps
		XQKU5P	SFRB784	75	ps
		XQKU15P	FFRA1156	201	ps
		XQKU15P	FFRE1517	161	ps
These values represent the worst-case skew between any two SelectIO resources in the package: shortest delay to longest delay from die pad to ball. Package delay information is available for these device/package combinations. This information can be used to deskew the package.